Study note of LabVIEW FPGA (2)
After a few days of using LabVIEW FPGA, here are some thoughts:
It IS much more convinient programming in LabVIEW. When I came up with some problems, I spent very few time checking the logic rather than considering the syntax (which is fine) and the logic cycle (which is a nightmare);
The conversion of bitstream file takes longer and longer. At first it takes about 6 minutes, a length for pee, as the code grows now it takes about 20 minutes, a time for lunch. I can’t imagine how long it would take when I do a more complex work;
The genenration of clock and signals works:)
We can use Target-Scoped FIFO to perform a Producer-Consumer Loop in FPGA vi;
The size of the array needs to be fixed before hand in FPGA vi;
Loop rates limited by longest path.If the process takes longer than the defined loop timer, it will use the longer one.
Attached is my code. In the producer loop, we generate a train of pulses and push them into a FIFO; in the consumer loop, we pop the data and output it on Connector1/Port0.
I’m somehow preventimg myself from updating the posts too frequently. It’s always harder to write the 10th post (or post after 1 month). I hope I can stick on this.